The invention relates to a method and a device for processing data packets which have been received or are to be transmitted on a data channel and which in particular contain time-critical data, so that the checking of the up-to-dateness of the data packet is highly significant.
The invention is based on method for processing data packets which have been received or are to be transmitted on a data channel of the generic type of the independent Claim 1.
The term multimedia is used to refer to the current growing together of the product sectors of consumer electronics (hi-fi, video, audio) and personal computing, and many manufacturers from both sides are even pushing ahead with actual products. The fusion of the two product sectors means that work concerning the exchange of data between the pieces of equipment from the different product sectors is becoming more and more significant. This is also apparent from the efforts of standardization in this sector, which are already well advanced. In particular, the so-called IEEE 1394 Serial Bus is an internationally standardized and very widely accepted bus for data exchange between terminals from both product groups which is already available. The precise designation of the aforesaid standard is: IEEE Standard for High Performance Serial Bus, (IEEE Std 1394-1995, IEEE, New York, August 1996). The specification of the IEEE 1394 Serial Bus comprises a series of criteria which are highly significant for products from the sector of consumer electronics:
Virtually freely selectable bus topology (for example, chain, tree . . . ) with up to 63 terminals,
bit-serial data transmission over a cable with 4 or 6 conductors with a maximum distance of 4.5 metres between two pieces of equipment,
transmission rates of up to 400 Mbit/s at present,
terminals can be connected and disconnected during operation.
In order to produce an IEEE 1394 interface it is necessary to implement two layers of the IEEE 1394 Standard using hardware: these are the physical layer and link layer which are known from the ISO/IEC-7-layer model. The connection to the bus is managed with the physical layer, while essential parts of the bus protocol are implemented in the link layer. Since a galvanic separation between the physical layer and the link layer is provided in the IEEE 1394 Standard, the implementation is generally effected using separate ICs.
When data are transmitted from the piece of consumer electronics equipment to another piece of equipment, an isochronous data transfer takes place in which a quantity of data have to be transmitted on a regular basis under real-time conditions, since the corresponding application of the data proceeds without faults only if the data have arrived at the correct time and can correspondingly also be processed correctly. Therefore, a special standard has been developed for the exchange of such data. This standard is known under the designation IEC-61883 (Consumer Audio/Video Equipment-Digital Interface). The precise designation of this standard is: IEC-61883-1: Consumer Audio/Video Equipment-Digital Interface (Draft) IEC., September 1997. In it there is provision for data packets to be provided with a so-called time stamp. This time stamp relates to the bus time of the IEEE 1394 Serial Bus and specifies the precise time at which a data packet is to be output to the application via the bus after the transmission. For the production of a link layer IC with implemented IEC 61883 functionality this means that a series of additional functions have to be implemented. In particular, these are:
The time stamp is generated during the transfer of the packet to the link layer IC,
the time stamp is checked before the transmission of the packet via the IEEE 1394 Serial Bus (xe2x80x9clate checkxe2x80x9d during the transmission of packets),
the received packet is output to an application (xe2x80x9clate checkxe2x80x9d during the reception of packets) under the control of time stamps.
Here, the generation of the time stamps is the simplest of the three enumerated tasks. This task can be achieved by simply adding an offset to the IEEE 1394 bus time which is available on a standard basis in the link layer IC. The current time stamp is then formed for a packet to be sent, and is stored, in addition to the data of the packet, in the memory of the link layer control IC.
The checking of the time stamp of a packet located in the memory, before the transmission over the IEEE 1394 Serial Bus, or secondly after the reception before the data packet is output to the application, is significantly more complex. The purpose of the first check is that a packet which can no longer reach the destination system at the correct time owing to the delay during the processing of previous packets is no longer output onto the IEEE 1394 Serial Bus. This would only load the bus unnecessarily. The second check brings about synchronization of the received data packets before they are output to the application.
The implementation of the two last mentioned checks gives rise to a considerable portion of the hardware complexity of the complete link layer IC.
Taking the abovementioned prior art as a starting point, the object of the invention is to specify a method and a device for processing data packets which have been received or are to be transmitted on a data channel, which method in particular reduces the costs for the implementation of the circuit unit which performs the checking of the up-to-dateness of the data packets, and operates reliably.
The part of the object which is directed to the method is achieved according to the invention by the measures which are given in Claim 1. The specified solution makes it possible to implement a single module which can carry out both of the previously explained checks in the time-division multiplex mode. One and the same unit is used for the aforesaid checking during the reception and transmission of data packets. A significant aspect of the invention consists in the fact that at the time of checking the up-to-dateness of a data packet, in both types of check initially the current system time (bus time) is determined and, on the basis of this time, the time axis is divided into at least the xe2x80x9ccorrectly timedxe2x80x9d and xe2x80x9cdelayedxe2x80x9d regions, and a check is then made to determine the region in which the processing time (time stamp) entered in the data packet lies. The advantage of this solution consists in the fact that the implementation for the circuit part or the module which has to perform the previously explained checks of the time stamps requires significantly less expenditure on hardware than is the case in a solution in which the time axis is not divided into regions and the time stamps of the data packets of an isochronous data transmission have to be checked by means of a large number of individual comparisons in conjunction with additions and subtractions as well as considerations of limiting values with intermediate storage steps.
This is mainly due to the fact that for a real system it is not possible to represent the time (bus time of the IEEE 1394 Serial Bus) from zero to infinity, but rather the time is represented by a limited number of bits (namely 25 bits) according to the IEC 61883 Standard. When a timing clock of 25 MHz is used, the time period which can be represented with 25 bits is only one second. The bus time must therefore continually be reset and updated. During the transmission of isochronous data over the bus, the application in the piece of equipment which is operating as transmitter will assign to each data packet a time stamp which is projected into the future relative to the current bus time, the offset having been determined in such a way that the transmission time which is necessary in all probability is taken into account and the data packet nevertheless still arrives early enough at the receiver. However, the signal processing or even excessively high bus loading may give rise to delays. For this reason, checking of the time stamp in terms of the up-to-dateness of the data packet must also take place in the receiver. In this process, the current bus time is then determined and it is ascertained relative thereto whether the time stamp of the data packet is still sufficiently far from the current bus time. If the time had been represented with sufficiently long data words, this comparison would be easy to carry out. However, since the time can only be represented with 25 bits, it may be the case that the current bus time is already situated towards the upper edge of the time period which can be represented, and the data packet has a time stamp which lies in the proximity of the origin of the time axis of the next time period. Thus, with simple larger/smaller comparisons it is no longer possible to determine whether the data packet is up to date or not. Specific calculations must be performed which also take into account that a xe2x80x9cresetxe2x80x9d of the bus time has been performed at a specific time.
The case in which the up-to-dateness of the data packet is checked when it is to be transmitted onto the bus is similar. In this case also, when the bus is heavily loaded it may be found that a data packet remains for a relatively long time in the buffer of the transmitting equipment. The data packet can only be transmitted if the bus is reserved for this piece of equipment, and it is then necessary to check once more whether its transmission is still necessary at all or whether it would in any case be transmitted too late for the destination system. With this check, the same problems may also arise as those previously mentioned. Simple additions/subtractions or comparisons between the values to be compared are also no longer possible here.
In accordance with the inventive method, the portion of the time axis which can be represented with 25 bits is divided into various regions. This is carried out on the basis of the current bus time at the time of the check. Since the precise position of the regions and their significance is known, the comparison operations can be simplified and it is possible to determine whether or not the data packet is still up to date. An appropriate reaction can then take place.
Further improvements of the method are possible by virtue of the measures disclosed in the dependent claims. For the correctly timed transmission of data packets it is particularly advantageous if a xe2x80x9cdelayedxe2x80x9d region is also arranged between the xe2x80x9ccorrectly timedxe2x80x9d region and the current system time. This xe2x80x9cdelayedxe2x80x9d region is used to take into account the bus transmission time which is absolutely necessary. The data packet is then not output at all if the current bus time is only just before the time stamp entered into the data packet, and sufficient transmission time would no longer be available.
In order to check the outputting of a received data packet to the application, it is very advantageous if a xe2x80x9csoonxe2x80x9d region is arranged between the xe2x80x9cdelayedxe2x80x9d region and the current system time. As soon as it is determined that the current bus time lies in the xe2x80x9csoonxe2x80x9d region, a precise counter can then be set directly to a specific value and started, said counter counting the time remaining up to the precise time when the data packet is output. Advantageous measures in conjunction with this are also specified in Claims 9 and 10. The measures according to Claims 12 and 13 make it possible to adapt the limits of the regions flexibly to the actual conditions in the network. If there is actually only a low level of bus traffic, the region which allows for the actual transmission time can also be adaptively decreased if appropriate.
By means of the measure according to Claim 14, the checking of the data packets can be, further simplified. By virtue of the fact that, for example, three possible configurations for the division of the time axis into the xe2x80x9ccorrectly timedxe2x80x9d, xe2x80x9cdelayedxe2x80x9d and xe2x80x9csoonxe2x80x9d regions are distinguished, it is possible to detect immediately without further comparison which of the regions has been split up into two sections by the overflow of the 25 bit word. This then clarifies the regions in which it is possible to operate with simple additions and subtractions or greater/smaller than comparisons for the checking of the up-to-dateness of the data packet.
One advantage of the method according to the invention is also that the division of the time axis into the aforementioned regions for the two previously mentioned types of checking in the receiver and in the transmitter appears the same in each case and can thus be carried out by the same hardware if both checks are necessary in one piece of equipment. As a result of this the implementation of the module is also simplified.
The part of the object of the invention which relates to the device for processing data packets which have been received or are to be transmitted on a data channel is achieved by means of the measures in Claim 16. Further advantageous measures in this respect are listed in the dependent Claims 16-19.